MIL-DTL-52872D
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The simulated ultrasonic Doppler signal for oscillatory motion shall be
obtained from the Doppler signal synthesizer. The signal simulating
oscillatory motion shall be:
(a) Continuous.
(b) Cyclic of period 2 seconds (sec).
(c) Zero at its start and symmetric about the zero reference.
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The ultrasonic clutter signal shall consist of broadband ultrasonic
noise as specified in 3.5.2.2.1.1. The clutter signal shall be
continuous and shall exceed RSPL at the receive transducer by at least
45 dB.
3.5.2.2.3. Oscillatory motion. For the minimum setting of the transceiver
range control at which the UMS conforms to 3.5.2.2.2, the UMS shall be in the
non-alarm state upon receipt of the ultrasonic Doppler signals simulating the
oscillatory motions listed in table I. The UMS shall be in the non-alarm
state when simulated oscillatory motion appears in the presence of the
ultrasonic clutter signal as listed in table I.
3.5.2.2.4. Out-of-band target signals. For the minimum setting of the
transceiver range control at which the UMS conforms to 3.5.2.2.2, the UMS
shall be in the non-alarm state upon receipt of the ultrasonic Doppler signals
simulating the unidirectional motions listed in table I with velocities less
than 0.4 fps and more than 20 fps.
3.5.2.3.
Detailed circuit requirements.
3.5.2.3.1. Transceiver range control.
The transceiver range control shall
provide an adjustment of at least 20 dB.
3.5.2.3.2. Alarm duration. When the alarm criteria are met, the UMS shall
be in the alarm state for not less than 0.5 seconds nor more than 1.5 seconds
after the signals or noise meeting the alarm criteria are removed.
3.5.2.3.3. Alarm output. The resistance across the processor alarm output
terminals (TB1-1 and TB1-2) shall be as follows:
a.
Non-alarm state:
less than 150 ohms.
b.
Alarm state:
more than 100 kilohms (k ohms).
The alarm output terminals shall be capable of accepting up to 10 mA dc in the
non-alarm state and up to 30 Vdc in the alarm state.
3.5.2.3.4. Power interruption. When power to the UMS is interrupted, or
the ground wire is disconnected, the processor shall be in the alarm state.
3.5.2.4. Tamper protection. The resistance between terminals 5 and 6 of
the transceiver and processor TB1 shall represent a tamper alarm condition by
exceeding 100k ohms, or a non-tamper condition by being less than 10 ohms.
The tamper alarm condition shall be presented whenever the cover is opened
from .062 to .250 inch (flanges engaged) and shall continue until the cover is
closed or the tamper switch actuator rod is pulled out to detented position
(maintenance position). The tamper switch shall reset by closing the cover.
3.5.2.5. Transceiver and transceiver CCA. The transceiver and the
transceiver CCA when furnished separately shall be in accordance with
TA13220E3226 and TA13220E3233 respectively and have the following
characteristics:
a.
Pre-amp gain. With the receive transducer disconnected and a
sinusoidal input signal of 26.3 ±0.1 kHz, 10.0 ±0.1 millivolt (mV)
peak-to-peak (P-P) applied across the receive jacks, the output
voltage at TB1-3 referenced to ground shall be 40 ±15 mV P-P with
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